videosync(3dm)
videosync - information about USTs and video timing on SGI systems
As shipped in IRIX 6.5. First release of IRIX 6.5.
NAME videosync - information about USTs and video timing on SGI systems SYNOPSIS #include <sys/videotiming.h> DESCRIPTION In various libraries on SGI systems such as the Video Library (VL), Unadjusted System Times (USTs) are used to indicate the time at which video fields or frames cross a jack (electrical input or output of the machine). Those USTs label a single point in time, yet the video field or frame occupies a sizeable range of time. Therefore, we must define a point, within the video waveform, which a video UST labels. This point is known as the video "synchronization point." The following rules define the synchronization point for all video signal formats supported by SGI hardware. Note that the file "videotiming.h" contains some useful constants related to these rules. ANALOG VIDEO These rules define that point for all analog video formats supported by SGI VL devices and SGI OpenGL devices: - Every analog video signal contains horizontal and vertical sync pulses. - If the horizontal and vertical sync pulses are present on one or two wires that carry no active video information, then we call this "component sync." In this case, the signal format determines what each pulse looks like. The choices are "active low" (each pulse consists of a downward excursion---a high-to-low edge followed by a low-to-high edge) or "active high" (each pulse consists of an upward excursion---a low-to- high edge followed by a high-to-low edge). Otherwise, we have "composite sync" or "embedded sync." The sync pulses always consist of downward excursions from blanking level (high) to sync level (low). The signal format also dictates the high and low voltages, which are the same for all pulses in that signal (signals with tri-level sync may have pulses to other voltages as well, but we are not interested in those pulses---for our purposes, those pulses are not sync pulses.). - The time at which a sync pulse "occurs" is the half-amplitude point of its leading edge, and the "length" of a sync pulse is the time elapsed between the half-amplitude points of its leading and trailing edges. - All the horizontal sync pulses in a video signal are of the same length. All the vertical sync pulses in a video signal are of the same length. - The vertical sync pulses are always wider than 0.25 times the signal's line period. Furthermore, the vertical sync pulses are the only sync pulses present in the signal that are wider than 0.25 times the signal's line period. These are the the pivotal observations on which our definition of the video synchronization point is based. - The vertical sync pulses always occur in contiguous groups of one or more. The groups are called "vertical sync pulse intervals." "Contiguous" means that no other sync pulses occur on any wire of the signal between the time at which the first vertical sync pulse occurs (inclusive) through the time at which the last vertical sync pulse occurs (exclusive). This definition even works for signals with separate horizontal and vertical sync wires, because in those signals there is only ever one vertical sync pulse in each vertical sync pulse interval. The time at which a vertical sync pulse interval "occurs" is the time at which the first vertical sync pulse inside that vertical sync pulse interval occurs. - All video signals have fields. There is one vertical sync pulse interval per field. - The synchronization point for a video field is the time at which each vertical sync pulse interval occurs. - Often it is convenient to group a repeating pattern of one or more fields of a video signal into frames. The synchronization point for a video frame is the synchronization point of the first field of that frame. EXAMPLE: NTSC VIDEO The NTSC signal is defined in ANSI/SMPTE 170M-1994 ("SMPTE 170M" below). Please refer to SMPTE 170M figure 7 for the line and field numbering scheme we will be using. The synchronization point for field 1 and field 3 is the half-amplitude point of the high-to-low transition at the leading edge of line 4. The synchronization point for field 2 and field 4 is the half-amplitude point of the high-to-low transition in the center of line 266. EXAMPLE: PAL VIDEO The PAL signal is defined in ITU-R BT. 470-3 ("ITU 470" below). Please refer to ITU 470 figure 5a for the line and field numbering scheme we will be using. The synchronization point for field I and field III is the half-amplitude point of the high-to-low transition at the leading edge of line 1. The synchronization point for field II and field IV is the half-amplitude point of the high-to-low transition in the center of line 313. DIGITAL VIDEO ITU-R BT. 601-4 ("ITU 601" below, also known as CCIR 601 or Recommendation 601) defines a sampling structure for 525- and 625-line digital video. We will define the synchronization points for 525- and 625-line digital video formats in terms of those defined above for the corresponding analog formats. Note that the line times (1 H) for the analog and digital signals are the same, but the analog and digital lines and fields start at different instants, and the analog and digital fields are not the same length. 525-LINE DIGITAL VIDEO Please refer to SMPTE 170M figure 7 for the 525-line analog line and field numbering scheme we will be using. Define point A as the horizontal reference point (see SMPTE 170M figure 5) leading analog line 1. ANSI/SMPTE 125M-1992 ("SMPTE 125M" below) defines a 525-line bit-parallel digital ITU 601 signal. Please refer to SMPTE 125M figure 4 for the digital line and field numbering scheme we will be using. Define point B as the half-amplitude point of the low-to-high transition of the clock (see SMPTE 125M figure 5) signaling the transmission of word 1473 (Y sample 736) of digital line 1. ANSI/SMPTE 259M-1993 ("SMPTE 259M" below) defines a 525-line bit-serial digital ITU 601 signal. It uses the same line and field numbering scheme as SMPTE 125M. Define s[n] as the n'th scrambled bit that is transmitted over a SMPTE 259M connection. A SMPTE 259M receiver must descramble the bits s[n] into an unscrambled sequence u[n] as per SMPTE 259M 5.2. Therefore, all SMPTE 259M receivers compute u[n] using this math: u[n] = s[n] xor s[n-1] xor s[n-5] xor s[n-6] xor s[n-9] xor s[n-10] Define M so that u[M] is the least significant bit of word 1473 (Y sample 736) of digital line 1. Point C lies midway between the leading and trailing edges of the bit s[M] which is used to compute u[M] using the formula above. Consider a SMPTE 170M analog signal, a SMPTE 125M digital signal, and a SMPTE 259M digital signal which are lined up so that point A, B, and C coincide. The synchronization point of field 1 of the digital signals is the synchronization point of field 1 (or 3) of the analog signal. The synchronization point of field 2 of the digital signals is the synchronization point of field 2 (or 4) of the analog signal. For convenience, we work the values out using the information above. The synchronization point for field 1 of the bit-parallel signal is the half-amplitude point of the low-to-high transition of the clock signaling the transmission of word 1473 (Y sample 736) of digital line 4. The synchronization point for field 2 of the bit-parallel signal is the half-amplitude point of the low-to-high transition of the clock signaling the transmission of word 615 (Y sample 307) of digital line 266. The synchronization point for field 1 of the bit-serial signal lies midway between the leading and trailing edges of the bit s[F1], such that a receiver computes u[F1] using the formula shown above, and u[F1] is word 1473 (Y sample 736) of digital line 4. The synchronization point for field 1 of the bit-serial signal lies midway between the leading and trailing edges of the bit s[F2], such that a receiver computes u[F2] using the formula shown above, and u[F2] is word 615 (Y sample 307) of digital line 266. Note: As shown in SMPTE 125M figure 2b and 4, a digital line starts with EAV at word 1440 and wraps from word 1715 to word 0 after SAV. 625-LINE DIGITAL VIDEO Please refer to ITU 470 figure 5a for the analog line and field numbering scheme we will be using. Define point A as the Oh instant (see ITU 470 figure 1a) leading analog line 1. ITU-R BT. 656-2 ("ITU 656" below) defines 525- and 625-line versions of a bit-serial and bit-parallel digital ITU 601 signal. We will not refer to the 525-line digital specification in ITU 656, as it is for use with M- PAL and not NTSC. Please refer to ITU 656 part 1 table 1 for the digital line and field numbering scheme we will be using. For the bit-parallel digital signal, define point B as the half-amplitude point of the low-to-high transition of the clock (see ITU 656 part 2 figure 2) signaling the transmission of Y sample 732 of digital line 1. For the bit-serial digital signal, as per ITU 656 part 3 section 2, the bits of each sample are scrambled using the same math as described for SMPTE 259M signals above. Using the same definitions of u[n] and s[n] as seen above, define M so that u[M] is the least significant bit of Y sample 732 of digital line 1. Point C lies midway between the leading and trailing edges of the bit s[M] which is used to compute u[M] using the formula above. Consider an ITU 470 analog signal, a bit-parallel ITU 656 digital signal, and a bit-serial ITU 656 digital signal which are lined up so that point A, B, and C coincide. The synchronization point of field 1 of the digital signals is the synchronization point of field 1 (or 3) of the analog signal. The synchronization point of field 2 of the digital signals is the synchronization point of field 2 (or 4) of the analog signal. For convenience, we work the values out using the information above. The synchronization point for field 1 of the bit-parallel signal is the half-amplitude point of the low-to-high transition of the clock signaling the transmission of Y sample 732 of digital line 1. The synchronization point for field 2 of the bit-parallel signal is the half-amplitude point of the low-to-high transition of the clock signaling the transmission of Y sample 300 of digital line 313. The synchronization point for field 1 of the bit-serial signal lies midway between the leading and trailing edges of the bit s[F1], such that a receiver computes u[F1] using the formula shown above, and u[F1] is Y sample 732 of digital line 1. The synchronization point for field 1 of the bit-serial signal lies midway between the leading and trailing edges of the bit s[F2], such that a receiver computes u[F2] using the formula shown above, and u[F2] is Y sample 300 of digital line 313. Note: As per ITU 656 part 1 table 1 note 1 and 2, a digital line starts with EAV (Cb sample 360 then Y sample 720) and wraps from (Cr sample 431 then Y sample 863) to (Cb sample 0 then Y sample 0) after SAV. SEE ALSO dmGetUST(3dm), vlGetFrontierMSC(3dm), vlGetUSTMSCPair(3dm), vlGetUSTPerMSC(3dm)