getvid(3G)
setvid, getvid - set and get video registers
As shipped in IRIX 6.5.22. Unchanged since IRIX 6.5.
NAME setvid, getvid - set and get video registers FORTRAN 77 SPECIFICATION subroutine setvid(reg, value) integer*4 reg, value integer*4 function getvid(reg) integer*4 reg PARAMETERS reg expects the name of the register to access. value expects the value which is to be placed into reg. FUNCTION RETURN VALUE The returned value of getvid is the value read from register reg, or -1. -1 indicates that reg is not a valid register or that you queried a video register on a system without that particular board installed. DESCRIPTION setvid sets the specified video register to the specified value. getvid returns the value of the specified video register. A generic register, GL_VIDEO_REG, has been defined to allow you to access video capabilities that are present across the product line. Certain video capabilities may not be present on particular versions of Silicon Graphics products, and these limitations are outlined below. The previous practice was to use the DE_R1 register as the means for enabling or disabling these video capabilities; we encourage developers to use the GL_VIDEO_REG generic interface instead. To enable or disable one of the generic video capabilities, call getvid (GL_VIDEO_REG), and store the integer return value in a local variable. Then use one of the following bit fields from <gl/get.h> to set or clear the bit corresponding to the video capability you wish to enable or disable. GLV_GENLOCK (all products) Enables genlocking (when a genlock option is present). Note that setting this bit only causes the main raster subsystem to accept an external genlock signal; you will also have to program your video option (CG2, CG3, or BVO) and have it generate the genlock clock signal that the main raster subsystem locks to. This bit will be indirectly set whenever you call setvid() with a DE_R1 video format that calls for genlock (e.g. DER1_G_60HZ) GLV_TTLSYNC (IRIS-4D VGX only) When set, tells the raster subsystem to expect a ttl level genlock sync input source. Should only be used in conjunction with GLV_GENLOCK. GLV_UNBLANK (IRIS-4D GT, GTX, VGX) Enables raster video output when set. To prevent the X server from periodically blanking the screen, call blankt (0). GLV_SRED (IRIS-4D GT, GTX, VGX, Extreme) Enables sync on the red channel. GLV_SGREEN (all products) Enables sync on the green channel. On the Personal Iris, setting this bit enables sync on the red, green, and blue channels simultaneously. GLV_SBLUE (IRIS-4D GT, GTX, VGX, Extreme) Enables sync on the blue channel. GLV_SALPHA (IRIS-4D GT, GTX, VGX) Enables sync on the alpha channel. setvid and getvid support several different video boards; the board names and register identifiers are listed below. Display Engine Board DE_R1 CG2/CG3 Composite Video and Genlock Board CG_CONTROL CG_CPHASE CG_HPHASE CG_MODE BVO Broadcast Video Option For information about programming the Broadcast Video Option (EV1 Board) refer to the Broadcast Video and GenLock Option for the VGX Graphics Board Set. This document will contain descriptions for the bit mask assignments (defined in <gl/bvo.h> to be used when programming the BVO_MODE_REG register or reading from the BVO_STAT_REG. Note: In genlock mode, the BVO will temporarily lose sync whenever you read from the BVO_MODE_REG. BVO_SUBCPHASE_REG BVO_HPHASE_REG BVO_MODE_REG BVO_STAT_REG VP1 Live Video Digitizer Board The Live Video Digitizer is available as an option for IRIS-4D GTX models only. (it is also available on certain IRIS-4D GT models). VP_ALPHA VP_BRITE VP_CMD VP_CONT VP_DIGVAL VP_FBXORG VP_FBYORG VP_FGMODE VP_GBXORG VP_GBYORG VP_HBLANK VP_HEIGHT VP_HUE VP_MAPADD VP_MAPBLUE VP_MAPGREEN VP_MAPRED VP_MAPSRC VP_MAPSTROBE VP_PIXCNT VP_SAT VP_STATUS0 VP_STATUS1 VP_VBLANK VP_WIDTH Iris Elan (GR2) Board Iris Extreme (GU1) Board Genlock is supported on the Iris Elan and Extreme graphics boards. GL_ELAN_ADJGENLOCK SEE ALSO getmon, getoth, setmon, videoc NOTES These routines are available only in immediate mode. The DE_R1 register is actually present only on the video board used in the IRIS-4D B, and G. It is emulated on all current models, but its usage is discouraged. We encourage developers to use the GL_VIDEO_REG interface instead when enabling or disabling generic video capabilities. Support for the DE_R1 register emulation will not be provided in the graphics library for future hardware products to be released by Silicon Graphics; use the GL_VIDEO_REG interface instead to guarantee your program's portability into the future. Iris Indigo Entry does not support setvid for any of the video registers including GL_VIDEO_REG. The reg and value parameters are ignored. On Iris Indigo Entry, getvid returns (GLV_UNBLANK | GLV_SGREEN) for GL_VIDEO_REG and returns -1 for all other registers. Iris Reality Engine Graphics option only supports GLV_GENLOCK option for setvideo. Video Output format changes are not supported from both setvideo and setmonitor. Users are advised to use setmon to change Video formats. For C, the symbolic constants named above are defined in the files <gl/cg2vme.h>, <gl/bvo.h>, <gl/vp1.h>, and <gl/gr2vid.h>. You will need to create your own versions of them for FORTRAN 77. Genlock control on CG2/CG3 board is not supported on Iris Elan, and no software support is needed to make use of the composite video capability. Iris Elan supports genlock on the graphics board. On Iris Elan, default is sync on the red, green, and blue signals. GLV_GENLOCK, GLV_SRED, GLV_SGREEN, and GLV_BLUE are the possible values returned for GL_VIDEO_REG, and -1 is returned for all other registers. On the Extreme and Indigo2 XZ, you have the added feature of selecting the sync for one or more of the color signals, so these two systems can also support GLV_GREENGENLOCK for GL_VIDEO_REG. setvid(GL_VIDEO_REG,0) will default to setting sync on all three color channels. To adjust genlock on Iris Elan, use setvid (GL_ELAN_ADJGENLOCK,value) or use the setmon command with the -j option. This value is not shadowed, so you can't use getvid to retrieve the genlock adjustment value. The genlock adjustment value is specified relative to the beginning of the line in the input signal. It starts out with a large, undocumented value. If you need a specific genlock adjustment, you should set it explicitly.