sync(3F)

sync: synchronize, fetch_and_add, fetch_and_sub, fetch_and_or, fetch_and_and, fetch_and_xor, fetch_and_nand, add_and_fetch, sub_and_fetch, or_and_fetch, and_and_fetch, xor_and_fetch, nand_and_fetch, lock_test_and_set, lock_release - FORTRAN synchronization primitives for multiprocessing

Showing IRIX 6.5. First release of IRIX 6.5.

NAME
     sync: synchronize, fetch_and_add, fetch_and_sub, fetch_and_or,
     fetch_and_and, fetch_and_xor, fetch_and_nand, add_and_fetch,
     sub_and_fetch, or_and_fetch, and_and_fetch, xor_and_fetch,
     nand_and_fetch, lock_test_and_set, lock_release - FORTRAN synchronization
     primitives for multiprocessing

SYNOPSIS
     integer*4 i4, j4, k4, jj4
     integer*8 i8, j8, k8, jj8
     logical*4 l4
     logical*8 l8

     call synchronize

     i4 = fetch_and_add (j4, k4)
     i8 = fetch_and_add (j8, k8)

     i4 = fetch_and_sub (j4, k4)
     i8 = fetch_and_sub (j8, k8)

     i4 = fetch_and_or (j4, k4)
     i8 = fetch_and_or (j8, k8)

     i4 = fetch_and_and (j4, k4)
     i8 = fetch_and_and (j8, k8)

     i4 = fetch_and_xor (j4, k4)
     i8 = fetch_and_xor (j8, k8)

     i4 = fetch_and_nand (j4, k4)
     i8 = fetch_and_nand (j8, k8)


     i4 = add_and_fetch (j4, k4)
     i8 = add_and_fetch (j8, k8)

     i4 = sub_and_fetch (j4, k4)
     i8 = sub_and_fetch (j8, k8)

     i4 = or_and_fetch (j4, k4)
     i8 = or_and_fetch (j8, k8)

     i4 = and_and_fetch (j4, k4)
     i8 = and_and_fetch (j8, k8)

     i4 = xor_and_fetch (j4, k4)
     i8 = xor_and_fetch (j8, k8)

     i4 = nand_and_fetch (j4, k4)
     i8 = nand_and_fetch (j8, k8)

     l4 = compare_and_swap( j4, k4, jj4)
     l8 = compare_and_swap( j8, k8, jj8)

     i4 = lock_test_and_set (j4 , k4)
     i8 = lock_test_and_set (j8 , k8)

     call lock_release(i4)
     call lock_release(i8)


DESCRIPTION
     The intrinsics described here provide a variety of primitive
     synchronization operations. Besides performing the particular
     synchronization operation, each of these intrinsics has two key
     properties:

         The function performed is guaranteed to be atomic (typically achieved
         by implementing the operation using a sequence of load-linked/store-
         conditional instructions in a loop).

         Associated with each intrinsic are certain memory barrier properties
         that restrict the movement of memory references to visible data
         across the intrinsic operation (by either the compiler or the
         processor).

         A visible memory reference is a reference to a data object
         potentially accessible by another thread executing in the same shared
         address space. A visible data object may be one of the following:

             C/C++ global data

             Fortran COMMON data

             data declared extern

             volatile data

             static data (either file-scope or function-scope)

             data accessible via function parameters

             automatic data (local-scope) that has had its address taken and
             assigned to some object which is visible (recursively).


         The memory barrier semantics of an intrinsic may be one of the
         following three types:

             acquire barrier

             Disallows the movement of memory references to visible data from
             after the intrinsic (in program order) to before the intrinsic
             (this behavior is desirable at lock-acquire operations, hence the
             name).


             release barrier

             Disallows the movement of memory references to visible data from
             before the intrinsic (in program order) to after the intrinsic
             (this behavior is desirable at lock-release operations, hence the
             name).

             full barrier

             Disallows the movement of memory references to visible data past
             the intrinsic (in either direction), and is thus both an acquire
             and a release barrier. A barrier only restricts the movement of
             memory references to visible data across the intrinsic operation:
             between synchronization operations (or in their absence), memory
             references to visible data may be freely reordered subject to the
             usual data-dependence constraints.

     Caution: Conditional execution of a synchronization intrinsic (such as
     within a if or a while statement) does not prevent the movement of memory
     references to visible data past the overall if or while construct.


     Atomic fetch-and-op Operations

     fetch_and_add, fetch_and_sub, fetch_and_or, fetch_and_and, fetch_and_xor
     and fetch_and_nand atomically perform the specified operation with the
     second operand on the first, and return the old value of the first
     operand. These intrinsics have full barrier memory semantics. Integer*4
     and Integer*8 specific versions of these intrinsics carry the _32 and _64
     suffix on the intrinsic name.



     Atomic op-and-fetch Operations

     add_and_fetch, sub_and_fetch, or_and_fetch, and_and_fetch, xor_and_fetch
     and nand_and_fetch atomically perform the specified operation with the
     second operand on the first, and return the new value of the first
     operand. These intrinics have full barrier memory semantics. Integer*4
     and Integer*8 specific versions of these intrinsics carry the _32 and _64
     suffix on the intrinsic name.


     Atomic compare-and-swap Operation

     The compare_and_swap intrinsics atomically compare the value of the first
     operand to the value of the second. If they are equal, the intrinsics
     store the value of the third operand into the first operand and return
     TRUE. Otherwise, they return FALSE. These intrinics have full barrier
     memory semantics. Integer*4 and Integer*8 specific versions of these
     intrinsics carry the _32 and _64 suffix on the intrinsic name.



     Atomic synchronize Operation

     The synchronize intrinsic has full barrier memory semantics.


     Atomic lock-test-and-set Operation

     The lock_test_and_set intrinsics atomically store the value of the second
     operand into the first and return the old value of the first operand.
     They have acquire barrier memory semantics.  Integer*4 and Integer*8
     specific versions of these intrinsics carry the _32 and _64 suffix on the
     intrinsic name.


     Atomic lock_release Operation

     The lock_release intrinsics set the first operand to zero. They have
     release barrier memory semantics.  Integer*4 and Integer*8 specific
     versions of these intrinsics carry the _32 and _64 suffix on the
     intrinsic name.